GRAPH NAME HARDWARE AND ARCHITECTURE *** ## NODE 1 NAME Z3 DATE 1941-05-12 PLACE Germany - Berlin WHO Konrad Zuse BRIEF DESCRIPTION Konrad Zuse presents the Z3, a programmable electromechanical computer based on relays and binary arithmetic. It represents an important precursor to general-purpose programmable digital computers. LINK *** ## NODE 2 NAME ENIAC DATE 1946-02-14 PLACE USA - Pennsylvania - Philadelphia WHO John Mauchly and J. Presper Eckert BRIEF DESCRIPTION ENIAC is publicly presented as a general-purpose electronic digital computer. It used thousands of vacuum tubes and could perform calculations at speeds far greater than earlier electromechanical machines. LINK *** ## NODE 3 NAME STORED PROGRAM DATE 1945-06-30 PLACE USA WHO John von Neumann BRIEF DESCRIPTION The First Draft of a Report on the EDVAC describes a computer organization in which instructions and data can be stored in memory. This principle becomes a fundamental reference for general-purpose computer architecture. LINK *** ## NODE 4 NAME TRANSISTOR DATE 1947-12-23 PLACE USA - New Jersey - Murray Hill WHO John Bardeen and Walter Brattain BRIEF DESCRIPTION A point-contact transistor is experimentally demonstrated at Bell Laboratories. The device makes it possible to amplify and switch electronic signals using semiconductors and establishes an increasingly efficient and compact alternative to vacuum tubes. LINK *** ## NODE 5 NAME MANCHESTER BABY DATE 1948-06-21 PLACE United Kingdom - England - Manchester WHO Frederic Williams and Tom Kilburn BRIEF DESCRIPTION The Manchester Baby executes a program stored electronically in memory. The experiment provides a practical demonstration of the stored-program concept and contributes to the subsequent development of operational electronic computers. LINK *** ## NODE 6 NAME EDSAC DATE 1949-05-06 PLACE United Kingdom - England - Cambridge WHO Maurice Wilkes BRIEF DESCRIPTION EDSAC enters operation at the University of Cambridge as one of the earliest practical stored-program electronic computers. It was used for actual scientific work and contributed to the development of early programming techniques. LINK *** ## NODE 7 NAME MAGNETIC CORE MEMORY DATE 1953 PLACE USA - Massachusetts - Cambridge WHO MIT BRIEF DESCRIPTION Magnetic core memory begins to be used operationally in computer systems. It provides random-access main storage, retains information through power interruptions, and offers greater reliability than several earlier memory technologies. LINK *** ## NODE 8 NAME INTEGRATED CIRCUIT DATE 1958-09-12 PLACE USA - Texas - Dallas WHO Jack Kilby BRIEF DESCRIPTION Jack Kilby demonstrates a functional circuit whose electronic components are integrated on the same semiconductor material. Integration reduces size, connections, and power consumption and establishes a technological foundation for microelectronics. LINK *** ## NODE 9 NAME MOSFET DATE 1959 PLACE USA - New Jersey - Murray Hill WHO Mohamed Atalla and Dawon Kahng BRIEF DESCRIPTION Mohamed Atalla and Dawon Kahng develop the MOSFET at Bell Laboratories. Its structure enables high integration density and low power consumption, characteristics that later make it the dominant device in digital integrated circuits. LINK *** ## NODE 10 NAME IBM SYSTEM/360 DATE 1964-04-07 PLACE USA - New York WHO IBM BRIEF DESCRIPTION IBM announces System/360, a family of computers based on a compatible architecture spanning different performance levels. The approach more systematically separates the architecture visible to software from specific physical implementations. LINK *** ## NODE 11 NAME INTEL 4004 MICROPROCESSOR DATE 1971-11-15 PLACE USA - California - Santa Clara WHO INTEL BRIEF DESCRIPTION Intel commercially introduces the 4004, which integrates the principal functions of a central processing unit into a single integrated circuit. This level of integration contributes to the development of microcomputers and embedded systems. LINK *** ## NODE 12 NAME INTEL 8080 DATE 1974-04 PLACE USA - California - Santa Clara WHO INTEL BRIEF DESCRIPTION Intel introduces the 8080, an 8-bit microprocessor with sufficient capability for broader computing applications. It was used in several early microcomputer systems and contributed to the expansion of personal computing. LINK *** ## NODE 13 NAME ALTAIR 8800 DATE 1975-01 PLACE USA - New Mexico - Albuquerque WHO MITS BRIEF DESCRIPTION The Altair 8800 popularizes the concept of a microcomputer based on a commercially available microprocessor. Its expansion architecture and adoption by hobbyists contribute to the emergence of the early personal computing ecosystem. LINK *** ## NODE 14 NAME RISC ARCHITECTURE DATE 1980 PLACE USA - California - Berkeley WHO UNIVERSITY OF CALIFORNIA BERKELEY BRIEF DESCRIPTION Academic Reduced Instruction Set Computer projects investigate processors with simplified instruction sets, efficient execution, and greater suitability for pipelining techniques. The approach broadly influences later high-performance and embedded processor architectures. LINK *** ## NODE 15 NAME MIPS DATE 1981 PLACE USA - California - Stanford WHO John Hennessy BRIEF DESCRIPTION The MIPS project investigates a RISC architecture designed to simplify instructions and facilitate pipelined execution. Its principles contribute to the later development of commercial processors and the systematic study of architectural performance. LINK *** ## NODE 16 NAME ARM1 DATE 1985-04-26 PLACE United Kingdom - England - Cambridge WHO ACORN COMPUTERS BRIEF DESCRIPTION The first functional ARM processor demonstrates a RISC architecture designed with a compact instruction set and efficient implementation. The ARM family later evolves into an architecture widely used in embedded systems and mobile devices. LINK *** ## NODE 17 NAME SUPERSCALAR ARCHITECTURE DATE 1989 PLACE USA WHO SEMICONDUCTOR INDUSTRY BRIEF DESCRIPTION Superscalar architectures begin incorporating multiple execution units capable of initiating more than one instruction per cycle. This approach increases instruction-level parallelism and becomes a central technique in high-performance microprocessors. LINK *** ## NODE 18 NAME PROGRAMMABLE GPU DATE 1999-08-31 PLACE USA - California - Santa Clara WHO NVIDIA BRIEF DESCRIPTION NVIDIA announces the GeForce 256 and uses the term GPU to describe a highly integrated graphics processor with hardware transformation and lighting. The subsequent evolution of these architectures enables massive parallelism to also be used for general-purpose computing. LINK *** ## NODE 19 NAME MULTICORE PROCESSORS DATE 2005 PLACE USA WHO SEMICONDUCTOR INDUSTRY BRIEF DESCRIPTION Multicore processors become increasingly common in commercial systems by integrating multiple processing cores within a single package or circuit. This transition shifts part of performance growth from increasing clock frequency toward explicit parallelism. LINK *** ## NODE 20 NAME AI ACCELERATORS DATE 2016 PLACE USA - California WHO GOOGLE BRIEF DESCRIPTION Google discloses the use of Tensor Processing Units specifically designed for machine-learning workloads. These accelerators represent a trend toward specialized architectures optimized for matrix operations and large-scale neural models. LINK